Automated Physical Design of Microchip-Based Capillary Electrophoresis Systems

Abstract

Recently, micro fluidic biochips are gaining much attention. Especially microchip-based capillary electrophoresis system is one of the techniques that are developed in the area of separation on a microchip. In this paper, we present an automated physical design methodology for microchip based capillary electrophoresis channel systems. The proposed methodology includes three stages: (1) placement of subsystems, (2) routing of auxiliary channels, and (3) placement of I/O wells. In the first stage, simulated annealing is applied to place the subsystems such that the chip area and the cost of routing the auxiliary channels are minimized. Then the second stage is applied to route the auxiliary channels from the ports of the subsystems to the boundaries of chip. The objective of this stage is to minimize the length and the number of bends of the auxiliary channels. Finally, the third stage places the I/O wells on the boundaries. The experimental results show that the proposed methodology can achieve better results of chip area as well as the total length and number of bends of auxiliary channels.