{"title":"A switchable quadband LNA for mobile wireless communications exploiting varactor tuning","authors":"Nam-Jin Oh","doi":"10.1109/IMWS2.2011.6027211","DOIUrl":null,"url":null,"abstract":"A low-power switchable quad-band CMOS LNA for PCS(1.8 GHz), WCDMA(2.1 GHz), WiBro(2.3 GHz), and LTE(2.6 GHz) applications is presented. The proposed LNA has an advantage of occupying less chip area compared to other concurrent topology which uses more inductors by adopting LC tank resonators. Also, it consumes less current compared to other topology which adopts a switched parallel transistor technique. The proposed LNA is designed using a 0.18-µm CMOS technology. The LNA core draws only 2.6 mA from a 1 V supply voltage. The S11 and S22 of the proposed LNA are less than −10 dB in the four frequency bands. The noise figure is less than 3.5 dB. The power gain is larger than 20 dB.","PeriodicalId":367154,"journal":{"name":"2011 IEEE MTT-S International Microwave Workshop Series on Intelligent Radio for Future Personal Terminals","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE MTT-S International Microwave Workshop Series on Intelligent Radio for Future Personal Terminals","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMWS2.2011.6027211","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A low-power switchable quad-band CMOS LNA for PCS(1.8 GHz), WCDMA(2.1 GHz), WiBro(2.3 GHz), and LTE(2.6 GHz) applications is presented. The proposed LNA has an advantage of occupying less chip area compared to other concurrent topology which uses more inductors by adopting LC tank resonators. Also, it consumes less current compared to other topology which adopts a switched parallel transistor technique. The proposed LNA is designed using a 0.18-µm CMOS technology. The LNA core draws only 2.6 mA from a 1 V supply voltage. The S11 and S22 of the proposed LNA are less than −10 dB in the four frequency bands. The noise figure is less than 3.5 dB. The power gain is larger than 20 dB.