Reconfigurable current-mode multiple-valued residue arithmetic circuits

Katsuhiko Shimabukuro, Chotei Zukeran
{"title":"Reconfigurable current-mode multiple-valued residue arithmetic circuits","authors":"Katsuhiko Shimabukuro, Chotei Zukeran","doi":"10.1109/ISMVL.1998.679471","DOIUrl":null,"url":null,"abstract":"This paper presents new reconfigurable multiple-valued residue arithmetic circuits, in which multiplication and addition can be performed alternatively. In order to construct the reconfigurable arithmetic circuits, we develop shifting-based hardware algorithms for both mod m/sub i/ multipliers and mod m/sub i/ adders. The proposed algorithms utilize three-valued one-hot coding for the representation of each residue digit effectively. By the coding, mod m/sub i/ multiplication can be simply performed by a shift operation and sign inversion. In mod m addition, the operation is decomposed into several operations, which include an inverse operation, two multiplications and an increment operation. It is demonstrated that the proposed hardware algorithms of residue arithmetic are useful to implement the reconfigurable current-mode multiple-valued residue arithmetic circuits, which are comparable to the conventional ones.","PeriodicalId":377860,"journal":{"name":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.1998.679471","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8

Abstract

This paper presents new reconfigurable multiple-valued residue arithmetic circuits, in which multiplication and addition can be performed alternatively. In order to construct the reconfigurable arithmetic circuits, we develop shifting-based hardware algorithms for both mod m/sub i/ multipliers and mod m/sub i/ adders. The proposed algorithms utilize three-valued one-hot coding for the representation of each residue digit effectively. By the coding, mod m/sub i/ multiplication can be simply performed by a shift operation and sign inversion. In mod m addition, the operation is decomposed into several operations, which include an inverse operation, two multiplications and an increment operation. It is demonstrated that the proposed hardware algorithms of residue arithmetic are useful to implement the reconfigurable current-mode multiple-valued residue arithmetic circuits, which are comparable to the conventional ones.
可重构电流模式多值剩余算术电路
本文提出了一种新的可重构多值剩余算术电路,其中乘法和加法可以交替进行。为了构建可重构的算术电路,我们开发了基于移位的硬件算法,用于模取m/sub i/乘法器和模取m/sub i/加法器。该算法利用三值一热编码有效地表示每个剩余数字。通过编码,模m/下标i/乘法可以简单地通过移位操作和符号反转来执行。在mod - m加法中,运算被分解为几个运算,其中包括一个逆运算、两个乘法和一个自增运算。实验结果表明,所提出的残数运算硬件算法可用于实现可重构电流模式多值残数运算电路,且与传统的残数运算电路相当。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信