J. Alieu, T. Skotnicki, E. Josse, J. Regolini, G. Brémond
{"title":"Multiple SiGe well: a new channel architecture for improving both NMOS and PMOS performances","authors":"J. Alieu, T. Skotnicki, E. Josse, J. Regolini, G. Brémond","doi":"10.1109/VLSIT.2000.852797","DOIUrl":null,"url":null,"abstract":"We present, for the first time, multiple SiGe quantum wells as a new channel architecture allowing increased performances for both NMOS and PMOS short channel transistors. We show that interleaved Si layers are strained as well as SiGe layers which strongly increases both electron and hole mobilities. Comparing multiple well and pure Si epitaxial channel devices, we demonstrate the ability of our structure to better control SCE for both NMOS and PMOS.","PeriodicalId":268624,"journal":{"name":"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2000.852797","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16
Abstract
We present, for the first time, multiple SiGe quantum wells as a new channel architecture allowing increased performances for both NMOS and PMOS short channel transistors. We show that interleaved Si layers are strained as well as SiGe layers which strongly increases both electron and hole mobilities. Comparing multiple well and pure Si epitaxial channel devices, we demonstrate the ability of our structure to better control SCE for both NMOS and PMOS.