S. Jameson, N. Buadana, E. Sźulc, A. Sayag, Isaac Sarusi, A. Wolfman, O. Shaham
{"title":"A 18-24 GHz Compact Single Stage Amplifier with 13 ± 0.5 dB gain, OP3dB of +19 dBm and 19% PAE for Radar Applications in Tower 180 nm CMOS","authors":"S. Jameson, N. Buadana, E. Sźulc, A. Sayag, Isaac Sarusi, A. Wolfman, O. Shaham","doi":"10.1109/COMCAS44984.2019.8958241","DOIUrl":null,"url":null,"abstract":"This paper proposes a modified differential cascode amplifier topology for mm-wave applications requiring wideband amplification, flatness and compact integration area. The proposed topology was used to create a single stage power amplifier with +13 dB small-signal gain ±0.5 dB flatness over 18 - 24 GHz. The power amplifier load-pull and biasing were optimized to reach a maximum PAE around 3 dB compression to minimize AM-PM variation and maximize performance-to-reliability ratio in large phased array transmitters. At 3 dB compression, an output power of +19 dBm with a peak PAE of 19% was measured around 18 GHz. Respectively, at 8 dB compression a peak power of +20 dBm is achieved and is over +19 dBm up to 24 GHz. The circuit demonstrates one of the smallest core area (0.16 mm2) and excellent power density. The proposed topology presents currently a record small signal gain per stage at this technology node ($f_{T}/f_{max}$ of 59/65 GHz). The presented amplifier topology can be used repetitively and reliably to create wide-band amplifiers with state-of-the-art gain, flatness and return loss over small area. The circuit was realized using Tower’s 180 nm CMOS.","PeriodicalId":276613,"journal":{"name":"2019 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/COMCAS44984.2019.8958241","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper proposes a modified differential cascode amplifier topology for mm-wave applications requiring wideband amplification, flatness and compact integration area. The proposed topology was used to create a single stage power amplifier with +13 dB small-signal gain ±0.5 dB flatness over 18 - 24 GHz. The power amplifier load-pull and biasing were optimized to reach a maximum PAE around 3 dB compression to minimize AM-PM variation and maximize performance-to-reliability ratio in large phased array transmitters. At 3 dB compression, an output power of +19 dBm with a peak PAE of 19% was measured around 18 GHz. Respectively, at 8 dB compression a peak power of +20 dBm is achieved and is over +19 dBm up to 24 GHz. The circuit demonstrates one of the smallest core area (0.16 mm2) and excellent power density. The proposed topology presents currently a record small signal gain per stage at this technology node ($f_{T}/f_{max}$ of 59/65 GHz). The presented amplifier topology can be used repetitively and reliably to create wide-band amplifiers with state-of-the-art gain, flatness and return loss over small area. The circuit was realized using Tower’s 180 nm CMOS.