An approach for increasing the flexibility of systolic arrays

Abstract

A study is made of the operations of systolic arrays. A graph is developed to present array operation as a function of the compute cycle. A description is given of a computational procedure to determine such a graph. The graph representation is used to analyze the operation of an array and to detect special cases with reduced computational complexity. A matrix-vector multiplication array is used as a case study. Manipulation of the graph representation is used to determine sparsity patterns in the input data matrices. The resulting forms generate matrix products computable in reduced time.<>