Digitally programmable DC-DC voltage down converter

AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360) Pub Date : 1900-01-01 DOI:10.1109/APASIC.1999.824109

M. Lin, H. Lin, C. Chen, S. Jou

引用次数: 0

Abstract

This paper describes a digitally programmable DC-DC voltage down converter (VDC) with a new structure of pulse width modulation (PWM) circuit. The PWM circuit is constructed by a cascaded digitally controlled oscillator (DCO) delay cells and provides two control words to select the operating frequency and duty cycle respectively. The VDC was implemented with a 0.6-/spl mu/m triple-metal CMOS process on 1000/spl times/1000 /spl mu/m/sup 2/ core size. The simulation results show that it can convert +5 V input voltage to +2/spl sim/+5 V output voltage in the 50 /spl mu/s settling time.

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数字可编程DC-DC下压转换器

本文介绍了一种具有新型脉宽调制电路结构的数字可编程DC-DC降压变换器。PWM电路由一个级联的数字控制振荡器(DCO)延迟单元构成，并提供两个控制字分别选择工作频率和占空比。VDC采用0.6-/spl mu/m的三金属CMOS工艺实现，核心尺寸为1000/spl倍/1000 /spl mu/m/sup 2。仿真结果表明，该电路能在50 /spl mu/s的稳定时间内将+ 5v输入电压转换为+2/spl sim/+ 5v输出电压。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)

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