CoarseZ Buffer Bandwidth Model in 3D Rendering Pipeline

Abstract

Depth traffic occupies a major portion of 3D graphics memory bandwidth. In order to reduce depth reading, we propose employing a low-resolution depth buffer, namely CoarseZ buffer, for tile-level depth culling before per-pixel test. The maximum depth of a tile is stored in the corresponding entry of CoarseZ buffer. Simulation results show that a small CoarseZ buffer can achieve remarkably high culling rate and significantly reduce z-reading bandwidth. We build a model that quantifies the influence of the CoarseZ design parameters on its efficiency and bandwidth. Test results of industrial benchmarks show that CoarseZ with tile size of 4 and bit depth of 16 can be a best selection to reduce memory bandwidth