VLSI structures for computing the Wigner distribution

Abstract

The authors propose and discuss hybrid VLSI architectures for implementing the Wigner distribution in any dimension. Two contributions are made to the analysis of pipelined architectures for digital signal processing. The first is in introducing the notion of asymptotic area efficiency which in addition to AT/sup 2/ is used as another focal point in the analyses. The second is in presenting a basic design methodology for pipelining arrays under construction of I/O bandwidth by matching their data rate ratios. Well-matched arrays yield good area-time performance with high efficiency. The pipeline methodology forms the basis for new architectures by a systematic construction from arrays that compute subproblems. The authors systematically search for an optimal structure for computing the Wigner distribution in any dimension from arrays that compute subproblems and (static) permutation networks. The pipelining technique yields several structures of which the optimal designs in the sense of AT/sup 2/ and area efficiency are extracted.<>