D. Garg, Vijay Kumar, M. M. Kumar, Y. Verma, S. Chaturvedi
{"title":"Low Noise Amplifier at Ka Band","authors":"D. Garg, Vijay Kumar, M. M. Kumar, Y. Verma, S. Chaturvedi","doi":"10.1109/IMARC.2017.8449723","DOIUrl":null,"url":null,"abstract":"This paper presents a low noise amplifier (LNA) design methodology and challenges at Ka Band using BiCMOS technology. A two stage single ended cascode narrowband LNA has been designed and fabricated using 130nm technology. A gain of 22.3dB and noise figure of 3.9dB at 35GHz with −23 dBm 1dB input compression point achieved in measurement results. The LNA consumes only 4.4mA of current from a 1.8V supply voltage and takes chip area, with a size of 1.2mm by 0.7mm including pads.","PeriodicalId":259227,"journal":{"name":"2017 IEEE MTT-S International Microwave and RF Conference (IMaRC)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE MTT-S International Microwave and RF Conference (IMaRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMARC.2017.8449723","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper presents a low noise amplifier (LNA) design methodology and challenges at Ka Band using BiCMOS technology. A two stage single ended cascode narrowband LNA has been designed and fabricated using 130nm technology. A gain of 22.3dB and noise figure of 3.9dB at 35GHz with −23 dBm 1dB input compression point achieved in measurement results. The LNA consumes only 4.4mA of current from a 1.8V supply voltage and takes chip area, with a size of 1.2mm by 0.7mm including pads.