An efficient IP core of Consultative Committee for Space Data Systems (CCSDS) Recommended Authenticated Cryptographic Algorithm

Abstract

Mission planners are continuously striving to ensure that spacecraft, associated ground systems, communication equipment and all transmitted data are adequately protected against attacks. In this paper, we present an Intellectual Property (IP) Core of Advanced Encryption Standard/ Galois Counter Mode (AES/GCM) with 256-bit key in FPGA suited for space data systems. This is the algorithm recommended by Consultative Committee for Space Data Systems (CCSDS) in order to ensure confidentiality, authenticity and integrity of data. Since space missions are vulnerable to anomalies caused by Single Event Effects (SEE), our implementation does not use memory blocks in FPGA. Sub-field arithmetic is used in the implementation of Substitution Box (S-box) module. Efficient architectures are used in the design of the MixColumn with embedded ShiftRows and Key generation modules using XOR operations and avoiding conditional shifts. Shift and Add method is used to implement the Galois Field (GF) (2128) Multiplier in the GCM authentication function. The design is ported to the Xilinx Space Grade Virtex-4 device XQR4VLX200. The functionality of AES/GCM implementation is verified using standard test vectors from National Institute of Standards and Technology (NIST). An implementation of AES/GCM using one each of AES-256 and GF(2128) multiplication cores achieves a high resource efficiency of 18% slices and a maximum frequency of 139.725 MHz