A nano-watt power CMOS amplifier with adaptive biasing for power-aware analog LSIs

Abstract

This paper presents an ultra-low power CMOS amplifier (AMP) using a simple and novel adaptive biasing current circuit (ABCC). The circuit uses a nano-ampere current source to achieve nano-watt power dissipation and the adaptive biasing technique to achieve high speed operation. The ABCC monitors the input voltages and supplies adaptive biasing current to the AMP. Because the adaptive biasing current is generated only when the AMP does not maintain its “virtual short” characteristic in the feedback configuration, the circuit operates with nano-watt power dissipation. Measurement results demonstrated that the circuit can operate with ultra-low power of 325 nA and high speed of 0.0506 V/μs at the rise time and 0.0579 V/μs at the fall time, when the input pulse frequency and the amplitude were 1 kHz and 0.8 Vpp.