An optimization technique for low-loss n/spl times/m microwave switch matrices

K. U-yen, J. Kenney
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引用次数: 10

Abstract

An approach to the optimum design of a large-scale blocking switch matrix has been developed. The approach minimizes insertion loss of any n/spl times/m switch matrix by deriving optimum configurations for all cascading states. Each state consists of either switches or junctions. To demonstrate an accuracy of the technique, we have designed an 8/spl times/2 switch matrix operating in the ISM band based on the optimization solution. The results indicate that the predicted insertion loss (2.90 dB) is agreed with the measured one (3.15 dB) at nominal frequency of 2.45 GHz. The agreement between the predicted and the measured insertion loss validates the practical use of the model.
低损耗n/spl次/m微波开关矩阵的优化技术
提出了一种大规模阻塞开关矩阵的优化设计方法。该方法通过推导所有级联状态的最佳配置,使任何n/spl次/m开关矩阵的插入损失最小化。每个状态由开关或结点组成。为了证明该技术的准确性,我们基于优化方案设计了一个在ISM频段工作的8/spl倍/2开关矩阵。结果表明,在2.45 GHz标称频率下,预测的插入损耗(2.90 dB)与实测的插入损耗(3.15 dB)吻合。预测结果与实测结果吻合,验证了该模型的实用性。
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