{"title":"A Novel Approach to Hardware Architecture Design and Advanced Optimization Techniques for Time Critical Applications","authors":"A. Kalyansundar, R. Chattopadhyay","doi":"10.1109/EUC.2008.113","DOIUrl":null,"url":null,"abstract":"Ubiquitous and pervasive computing systems are characterized by intelligent sensing and computing. These systems seamlessly understand and respond to the environment with little human intervention. Since such systems are required to be small and inobtrusive, embedded systems play an important role in their design. Furthermore, these systems need to run sophisticated applications in a resource constrained environment. In this paper we focus on computer vision applications in such systems. As these applications require larger memory and are computationally intensive, optimization of these algorithms is imperative. This paper discusses some optimization techniques and their impact on execution time in a complex real-world face tracking example. In certain scenarios, the requirement may be to suggest a hardware architecture for achieving a specific response time. This is especially important for mission critical applications in the fields of automotive, medical or defence. However, the estimation of hardware architecture parameters such as core-clock frequency, memory requirement, optimal number of parallel execution paths for a given application is not straight forward. In this paper, we also present a structured approach to determine the hardware architecture for a driver assistance and safety application with stringent performance constraints.","PeriodicalId":430277,"journal":{"name":"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","volume":"90 8-9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-12-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE/IFIP International Conference on Embedded and Ubiquitous Computing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EUC.2008.113","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Ubiquitous and pervasive computing systems are characterized by intelligent sensing and computing. These systems seamlessly understand and respond to the environment with little human intervention. Since such systems are required to be small and inobtrusive, embedded systems play an important role in their design. Furthermore, these systems need to run sophisticated applications in a resource constrained environment. In this paper we focus on computer vision applications in such systems. As these applications require larger memory and are computationally intensive, optimization of these algorithms is imperative. This paper discusses some optimization techniques and their impact on execution time in a complex real-world face tracking example. In certain scenarios, the requirement may be to suggest a hardware architecture for achieving a specific response time. This is especially important for mission critical applications in the fields of automotive, medical or defence. However, the estimation of hardware architecture parameters such as core-clock frequency, memory requirement, optimal number of parallel execution paths for a given application is not straight forward. In this paper, we also present a structured approach to determine the hardware architecture for a driver assistance and safety application with stringent performance constraints.