A Generic Fast and Low Cost BIST Solution for CMOS Image Sensors

Abstract

This paper demonstrates the generalization of a novel test solution embedded inside CMOS Image Sensors (CIS) to classify PASS/FAIL sensors during the test production phase. In [1], a Built-In Self-Test (BIST) solution was proposed to reduce the test time of a CIS, which can represent up to 30% of the final product cost. The major part of the test is dedicated to optical (i.e. image processsing) algorithms performed on the output images from the sensor under test with an Automatic Test Equipment (ATE). The BIST solution reuses these optical algorithms by simplifying and embedding them inside the sensor, to avoid a large amount of data storage and to limit the optical test time. First results on 4,800 output images from a package of sensors have shown a 99.95% correlation between results gathered from an ATE and those achieved with the proposed BIST, with a saving of approximately 30% in optical test time and a negligible area footprint. In this paper, to verify the effectiveness of the BIST solution on a wider set of different CIS (i.e., architecture, size and technology), we experimented the solution on a new database of 28,000 output images from a package of different sensors compared to the first package used in [1]. The BIST parameters have been configured to fit with the new type of sensors and results show a 99.64% correlation, which demonstrates the possible systematic implementation of the proposed BIST solution inside all CIS irrespective of their architecture and technology.