A 11 ppm/°c CMOS current reference circuit with no external components

Abstract

A new CMOS current reference circuit is described. The circuit designed in 65 nm CMOS standard process operates in the temperature range [-40...+130] °C with supply voltage from 2.1 V to 3.0 V. The reference current is 1 μA ± 0.9 nA having a line sensitivity of 0.5 nA/V and 200 dB power supply rejection ratio at low frequencies. No curvature compensation techniques are used. The circuit occupies 0.0091 mm2 silicon area.