A Survey of Formal Techniques for Hardware/Software Co-verification

Abstract

A growing trend for today's intelligent automotive industry is co-design of hardware alongside embedded, low-level software that closely interacts with it. Formal techniques have emerged as alternative ways to ensure the quality and correctness of embedded systems, overcoming some of the deficiencies of traditional validation techniques such as simulation and testing. Tighter integration of hardware and software components makes a strong case for the need of formal co-verification tools. In order to provide insight into the scope of currently available formal techniques, we survey a variety of frameworks and techniques proposed in the literature and applied to actual designs. There are two main aspects about the application of formal co-verification techniques: unified property specification and co-verification framework used to specify desired properties.