Memory power reduction for the highspeed implementation of turbo codes

Abstract

Turbo codes achieve the highest coding gain known and should be the best candidates for error correction in high-speed wireless systems. However, the standard implementation of their decoding standard of their decoding algorithm suffers from a large latency and high power consumption making them improper for mobile interactive systems. To overcome this drawback, we systematically analyzed the maximum a posteriori algorithm, the key-building block of the decoder, and stated that memory accesses are the bottleneck. Therefore, we have systematically optimized the data transfer and storage. This paper presents the main results of this optimization, especially those concerning the memory organization and architecture. This optimization reduces the latency by a factor of 600 and the energy per bit by a factor of 20, allowing turbo codes application in future high-speed mobile systems.