A Sixteen-Context Dynamic Optically Reconfigurable Gate Array

M. Nakajima, Minoru Watanabe
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引用次数: 4

Abstract

Demand for fast dynamic reconfiguration has increased since dynamic reconfiguration can accelerate the performance of implementation circuits on a programmable device. Such dynamic reconfiguration necessitates two important features: fast reconfiguration and numerous contexts. However, because fast reconfiguration and numerous contexts share a tradeoff relation on current VLSIs, optically reconfigurable gate arrays (ORGAs) have been developed to resolve this dilemma.ORGAs can realize a large virtual gate count that is much larger than those of current VLSI chips by exploiting the large storage capacity of a holographic memory. Furthermore, ORGAs can realize fast reconfiguration through use of large bandwidth optical connections between a holographic memory and a programmable gate array VLSI. Among such developments, we have been developing dynamic optically reconfigurable gate arrays (DORGAs)that realize a high gate density VLSI using a photodiode memory architecture. This paper presents the first demonstration of a 16-context DORGA architecture. Furthermore, we present experimental results: 530–833 ns reconfiguration times and 5-9.375 us retention times.
十六上下文动态光可重构门阵列
由于动态重构可以提高可编程器件上实现电路的性能,因此对快速动态重构的需求不断增加。这种动态重新配置需要两个重要特性:快速重新配置和大量上下文。然而,由于快速重构和众多上下文在当前vlsi上共享权衡关系,因此开发了光可重构门阵列(ORGAs)来解决这一困境。orga可以利用全息存储器的大存储容量,实现比当前VLSI芯片大得多的虚拟门数。此外,orga可以通过在全息存储器和可编程门阵列VLSI之间使用大带宽光连接来实现快速重构。在这些发展中,我们一直在开发动态光学可重构门阵列(DORGAs),该阵列使用光电二极管存储架构实现高栅极密度VLSI。本文首次展示了一个16上下文的DORGA体系结构。此外,我们还给出了实验结果:530-833 ns的重构时间和5-9.375 us的保留时间。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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