A low error add and shift-based efficient implementation of base-2 logarithm

Pervaiz Kareem, S. R. Naqvi, C. Kyung
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引用次数: 3

Abstract

A real-time and area-efficient hardware implementation of base-2 logarithm (log2) finds many applications. In this paper, we analyze previous shift and add-based approximations of logarithm. Based on the analysis we present a new two region add and shift-based method to approximate log2 in hardware. The proposed approach results in 81.55% less percentage error and 42.85% less average error compared to previously reported best two region based approximation approaches with comparable area cost and latency. The proposed method uses most significant four bits of fractional part of shift and add-based method with different weights to approximate fractional part of log2. Weights to these bits are assigned by simple addition, logical OR and logical AND operation to make hardware implementation more efficient.
基于低误差加和移位的以2为基数对数的高效实现
以2为基数的对数(log2)的实时和面积有效的硬件实现有许多应用。在本文中,我们分析了以往的基于移位和加法的对数近似。在此基础上,提出了一种新的基于两区域相加和移位的硬件近似方法。与之前报道的两种基于区域的最佳近似方法相比,该方法的百分比误差减少了81.55%,平均误差减少了42.85%,并且具有相当的面积成本和延迟。该方法利用shift的小数部分的最有效四位和不同权重的基于加法的方法来近似log2的小数部分。通过简单的加法、逻辑或运算和逻辑与运算来分配这些位的权重,使硬件实现更加高效。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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