High performance VLSI architecture for the trellis coded quantization

M. Bóo, Francisco Argüello, J. Bruguera, E. Zapata
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引用次数: 0

Abstract

Trellis coded quantization (TCQ) is an efficient technique for encoding memoryless sources. Furthermore TCQ can be incorporated into a transform coding structure (such as the discrete cosine transform) for encoding monochrome and color images with fixed rate or entropy-constrained schemes. In all these cases an expanded codebook is partitioned into subsets used to label the branches of an appropriate graph (trellis). For a given data sequence, the Viterbi algorithm is then used to find the minimum mean square error path through the trellis. We present a generic architecture scheme that can be easily adapted to the different TCQ image compression methods. We also present a formal model that permits a regular and modular design solution that is optimal for a particular set of area and/or speed constraints.
基于栅格编码量化的高性能VLSI架构
网格编码量化(TCQ)是一种有效的编码无记忆源的技术。此外,TCQ可以合并到一个变换编码结构(如离散余弦变换)编码单色和彩色图像与固定速率或熵约束方案。在所有这些情况下,扩展码本被划分为子集,用于标记适当图(网格)的分支。对于给定的数据序列,然后使用Viterbi算法通过网格找到最小均方误差路径。我们提出了一个通用的架构方案,可以很容易地适应不同的TCQ图像压缩方法。我们还提出了一个正式的模型,允许一个规则的和模块化的设计解决方案,这是一个特定的区域和/或速度限制的最佳设置。
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