Design of a High-speed 8-bit Flash ADC using Double-Tail Comparator on 180nm CMOS Process

Abstract

This paper presents a high-speed 8-bit Flash ADC. The design, which is considered as a mixed-signal type, includes two main blocks – comparator and encoder. The comparator block contains a TIQ comparator, a control circuit, and a proposed architecture of a Double-Tail (DT) comparator. The advantage of using the DT comparator is to reduce the half number of comparators which helps reduce the design area. The comparator is implemented with custom analog design meanwhile, the encoder block is designed with digital design flow. This mixed-signal circuit is designed and simulated on 180nm CMOS technology. The 8-bit Flash ADC only employs 128 comparators. The applied input clock for testing is 50 MHz with the input voltage ranging from 0.6V to 1.8V. Comparator block outputs 127 bits of thermometer code and sends them to the encoder, which exports 7 LSB bits of the binary code. The MSB bit is decided by only one DT comparator.