LHC Clock Conditioning Circuit for AFP Trigger Module

Abstract

The timing and synchronisation of the detectors in particle physics play the key role due to the high event rates at particle accelerators. The trigger module in ATLAS Forward Physics project selects the events from time of flight detector belonging to the proton bunch. As the time position of the proton bunch is the same within each Large Hadron Collider period, from the clock conditioning circuit (CCC) can be derived the qualification signal for the trigger module input signals. The further processing of these events in trigger module is allowed by the CCC qualification. High speed delay line integrated circuits together with the logic gates and FPGA based controller were used for the realization of the CCC. This paper describes the design, construction and test procedure of the CCC.