Nanophotonic interconnection networks for multicore embedded computing systems

K. Bergman, L. Carloni
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Abstract

Today's microprocessors are driven in performance by increases in the number of on-chip parallel computational cores rather than by the sheer acceleration of transistor speeds. These emerging chip multiprocessors (CMPs) are fundamentally different from traditional unicore microprocessors with architectures that essentially resemble highly parallel computing systems on-chip. Achieving maximum utilization of compute resources as the number of functional parallel units scales, falls increasingly on the efficiency of the information exchange among those resources. In this new communication-bound paradigm, the realization of a system-wide scalable communications infrastructure that can meet the enormous bandwidths, capacities, and stringent latency requirements in an energy efficient manner is a key goal for scaling future computation performance. We explore how recent advances in nanoscale silicon photonic technologies can be exploited for developing optical interconnection networks that address the critical bandwidth and power challenges presented for CMP computing systems.
用于多核嵌入式计算系统的纳米光子互连网络
今天的微处理器的性能是由芯片上并行计算核心数量的增加所驱动的,而不是由晶体管速度的加速所驱动的。这些新兴的芯片多处理器(cmp)从根本上不同于传统的单核微处理器,其架构本质上类似于芯片上的高度并行计算系统。随着功能并行单元数量的增加,实现计算资源的最大利用率越来越依赖于这些资源之间信息交换的效率。在这种新的通信绑定范例中,实现系统范围的可扩展通信基础设施,以节能的方式满足巨大的带宽、容量和严格的延迟要求,是扩展未来计算性能的关键目标。我们探讨了如何利用纳米级硅光子技术的最新进展来开发光互连网络,以解决CMP计算系统面临的关键带宽和功率挑战。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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