Modular Multiplication of Large Integers on FPGA

Abstract

Public key cryptography often involves modular multiplication of large operands (160 up to 2048 bits). Several researchers have proposed iterative algorithms whose internal data are carry-save numbers. This number system is unfortunately not well suited to today’s Field Programmable Gate Arrays (FPGAs) embedding dedicated carry logic. We propose to perform modular multiplication in a high-radix carry-save number system, where the sum bit of the well-known carry-save representation is replaced by a sum word. Two digits are then added by means of a small Carry-Ripple Adder (CRA). The originality of our approach is to analyze the modulus in order to select the most efficient high-radix carry-save representation.