FPGAs in the Cloud: Booting Virtualized Hardware Accelerators with OpenStack

Stuart Byma, J. Steffan, H. Bannazadeh, Alberto Leon Garcia, P. Chow
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引用次数: 229

Abstract

We present a new approach for integrating virtualized FPGA-based hardware accelerators into commercial-scale cloud computing systems, with minimal virtualization overhead. Partially reconfigurable regions across multiple FPGAs are offered as generic cloud resources through OpenStack (opensource cloud software), thereby allowing users to “boot” custom designed or predefined network-connected hardware accelerators with the same commands they would use to boot a regular Virtual Machine. We propose a hardware and software framework to enable this virtualization. This is a first attempt at closely fitting FPGAs into existing cloud computing models, where resources are virtualized, flexible, and have the illusion of infinite scalability. Our system can set up and tear down virtual accelerators in approximately 2.6 seconds on average, much faster than regular virtual machines. The static virtualization hardware on the physical FPGAs causes only a three cycle latency increase and a one cycle pipeline stall per packet in accelerators when compared to a non-virtualized system. We present a case study analyzing the design and performance of an application-level load balancer using a fully implemented prototype of our system. Our study shows that FPGA cloud compute resources can easily outperform virtual machines, while the system's virtualization and abstraction significantly reduces design iteration time and design complexity.
云中的fpga:使用OpenStack启动虚拟化硬件加速器
我们提出了一种新的方法,将基于fpga的虚拟化硬件加速器集成到商业规模的云计算系统中,并且虚拟化开销最小。跨多个fpga的部分可重构区域通过OpenStack(开源云软件)作为通用云资源提供,从而允许用户“启动”定制设计或预定义的网络连接硬件加速器,使用与启动常规虚拟机相同的命令。我们提出了一个硬件和软件框架来实现这种虚拟化。这是将fpga与现有的云计算模型紧密结合的第一次尝试,在现有的云计算模型中,资源是虚拟化的、灵活的,并且具有无限的可扩展性。我们的系统平均可以在2.6秒内建立和拆除虚拟加速器,比普通虚拟机快得多。与非虚拟化系统相比,物理fpga上的静态虚拟化硬件只会导致加速器中每个数据包的三个周期延迟增加和一个周期管道延迟。我们提出了一个案例研究,分析了应用程序级负载平衡器的设计和性能,使用了我们系统的完全实现原型。我们的研究表明,FPGA云计算资源可以轻松超越虚拟机,而系统的虚拟化和抽象显着减少了设计迭代时间和设计复杂性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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