Evaluation of machine learning classifiers in faulty die prediction to maximize cost scrapping avoidance and assembly test capacity savings in semiconductor integrated circuit (IC) manufacturing

Azlan Faizal Mohd Fazil, I. Shaharanee, J. Jamil
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Abstract

Semiconductor manufacturing is a complex and expensive process. The semiconductor packaging trending towards for more complex package with higher performance and lower power consumption. The silicon die is manufactured using smaller fab process technology node and packaging technology is using more complex and expensive packaging. The semiconductor packaging trend has evolved from single die packaging to multi die packaging. The multi die packaging requires more processing steps and tools in assembly process as well. All these factors cause cost per unit to increase. With this multi die packaging, it results higher loss in production yield compared to single die packaging because overall yield now is a function of multiplication of yield for each individual die. If any die from the final package tested at Class and found to be faulty not meeting the product specification, even the rest of die still passing the tests, the whole package will still be scrapped. This resulting in wasted good raw material (good die and good substrate) and manufacturing capacity used to assemble and test affected bad package. In this research work, a new framework is proposed for model training and evaluation for the machine learning application in semiconductor test with objective to screen bad die using machine learning before die attachment to package. The model training flow will have 2 classifier groupings which are control group and auto machine learning (ML) where feature selection with redundancy elimination method to be applied on input data to reduce the number of variables to minimum prior modeling flow. The control group will serve as reference. The other group, will use auto machine learning (ML) to run multiple classifiers automatically and only top 3 to be selected for next step. The performance metric used is recall rate at specified precision from ROI breakeven point. The threshold probability that correspond to fixed precision will be set as the classifier threshold during model evaluation on unseen datasets. The model evaluation flow will use 3 different non-overlapped datasets and comparison of classifiers will be based on recall rate and precision rate. This new framework will be able to provide range of possible recall rate from minimum to maximum, to identify which classifier algorithm performs the best for given dataset. The selected model can be implemented into actual manufacturing flow to screen predicted bad die for maximum cost scrapping avoidance and capacity savings.
评估机器学习分类器在半导体集成电路(IC)制造中故障模具预测中的应用,以最大限度地避免成本报废和节省组装测试容量
半导体制造是一个复杂而昂贵的过程。半导体封装向着更复杂的封装、更高的性能和更低的功耗发展。硅芯片采用更小的晶圆厂工艺技术节点制造,而封装技术采用更复杂和昂贵的封装。半导体封装的趋势已经从单晶片封装发展到多晶片封装。多模封装在装配过程中也需要更多的加工步骤和工具。所有这些因素导致单位成本增加。与单模包装相比,这种多模包装会导致更高的产量损失,因为现在的总体产量是每个单独模具产量乘法的函数。如果在班上对最终封装的模具进行了测试,发现有缺陷,不符合产品规格,即使其余的模具仍然通过了测试,整个封装仍将被废弃。这导致浪费了良好的原材料(良好的模具和良好的衬底)和用于组装和测试受影响的不良封装的制造能力。针对机器学习在半导体测试中的应用,提出了一种新的模型训练和评估框架,目的是在芯片贴装前利用机器学习对不良芯片进行筛选。模型训练流将有2个分类器组,分别是对照组和自动机器学习(ML),其中在输入数据上应用带有冗余消除方法的特征选择,以将变量数量减少到最小的先验建模流。对照组作为参照。另一组将使用自动机器学习(ML)自动运行多个分类器,只选择前3个分类器进行下一步。使用的性能指标是从ROI盈亏平衡点开始的指定精度的召回率。在对未见过的数据集进行模型评估时,将固定精度对应的阈值概率作为分类器阈值。模型评估流程将使用3个不同的非重叠数据集,分类器的比较将基于召回率和准确率。这个新框架将能够提供从最小到最大的召回率范围,以确定哪个分类器算法对给定的数据集表现最好。所选择的模型可以应用到实际生产流程中,以筛选预测的坏模具,最大限度地避免成本报废和节省产能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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