{"title":"OSSIE-based GRA testbed","authors":"E. Redding, T. Rittenbach, H. Satake, C. Dietrich","doi":"10.1109/MILCOM.2009.5380082","DOIUrl":null,"url":null,"abstract":"This purpose of this paper is to document an architectural validation approach for the Government Reference Architecture (GRA) for SATCOM terminals. The approach integrates the Virginia Tech OSSIE SCA Core Framework with a UML model of the GRA, coupled with low-fidelity models of the SATCOM components. This approach uses the Rhapsody tool to implement the GRA-based testbed from documentation through executable code generation. The end result is a system that demonstrates the portability of the GRA while simultaneously validating the GRA against a representative system. Furthermore, the system demonstrates the reduced development time required for architecture extensions through the incorporation of existing projects and automated code generation.","PeriodicalId":338641,"journal":{"name":"MILCOM 2009 - 2009 IEEE Military Communications Conference","volume":"145 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-10-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"MILCOM 2009 - 2009 IEEE Military Communications Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MILCOM.2009.5380082","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This purpose of this paper is to document an architectural validation approach for the Government Reference Architecture (GRA) for SATCOM terminals. The approach integrates the Virginia Tech OSSIE SCA Core Framework with a UML model of the GRA, coupled with low-fidelity models of the SATCOM components. This approach uses the Rhapsody tool to implement the GRA-based testbed from documentation through executable code generation. The end result is a system that demonstrates the portability of the GRA while simultaneously validating the GRA against a representative system. Furthermore, the system demonstrates the reduced development time required for architecture extensions through the incorporation of existing projects and automated code generation.