Characterizations of Charge-Trap Memory Thin-Film Transistors Using HfO2/ZnO Stack-Structured Charge-Trap Layer Controlled by Atomic Layer Deposition

Abstract

In this work, we fabricated IGZO-channel charge-trap-type memory thin-film transistors (CTM-TFTs) with HfO2/ZnO stack structured charge-trap layer (CTL) prepared by atomic-layer deposition (ALD) to investigate the effect of ALD cycle configuration controlled by the number and the thickness of inserted HfO21ayers between the ZnO. The CTM-TFTs using the CTL inserted by 4-nm-thick HfO2 showed good memory characteristics due to a high trap density, though the inserted 2-nm-thick HfO2 layer could not be effectively worked as CTL. As results, the memory window larger than 21 V as well as the program/erase speed faster than 500 μs were obtained for the CTM-TFTs by inserting two or fewer HfO2 layers with a thickness thicker than critical value into the ZnO thanks to high efficiency of charge-traps into the HfO2 thin films.