An 800 MHz monolithic GaAs HBT serrodyne modulator

L. Kushner, G. V. Andrews, W. White, J. Delaney, M. Vernon, M. Harris, David A. Whitmire
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引用次数: 4

Abstract

An 800 MHz monolithic mixed-signal serrodyne modulator IC has been developed in GaAs/AlGaAs HBT HI/sup 2/L process optimized for digital applications. This 3/spl times/2.8 mm, 2000+ transistor chip consists of a 7-bit phase accumulator driving a vector modulator, implemented as of a pair of balanced mixers, 5-bit switched-attenuators, buffer amplifiers, and control circuits. The balanced mixer's LO leakage and 3-1 products are typically 25 dB below the carrier at the nominal operating point, with all other spurs better than -50 dBc. Over a 32 dB control range, the 5-bit switched attenuator typically achieves worst-case amplitude and phase errors of 1.5 dB and 1.5/spl deg/, respectively, from 50 to 250 MHz. This first generation chip consumes 2.5 W of dc power and clocks to speeds in excess of 925 MHz.
800mhz单片GaAs HBT伺服调制器
在针对数字应用优化的GaAs/AlGaAs HBT HI/sup 2/L工艺中,开发了800 MHz单片混合信号伺服调制器IC。这款3/spl倍/2.8 mm, 2000+晶体管芯片由一个7位相位累加器驱动矢量调制器组成,由一对平衡混频器,5位开关衰减器,缓冲放大器和控制电路实现。平衡混合器的LO泄漏和3-1产品在标称工作点通常比载波低25 dB,所有其他杂散都优于-50 dBc。在32 dB控制范围内,5位开关衰减器通常在50至250 MHz范围内分别实现1.5 dB和1.5/spl度/的最坏情况幅度和相位误差。这第一代芯片消耗2.5 W直流功率,时钟速度超过925 MHz。
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