Communication-efficient implementation of block recursive algorithms on distributed-memory machines

S. Gupta, Chua-Huang Huang, Rodney W. Johnson, P. Sadayappan
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引用次数: 2

Abstract

This paper presents a design methodology for developing efficient distributed-memory parallel programs for block-recursive algorithms such as the fast Fourier transform and bitonic sort. This design methodology is specifically suited for most modern supercomputers having a distributed-memory architecture with circuit-switched or wormhole routed mesh or hypercube interconnection network. A mathematical framework based on the tenser product and other matrix operations is used for representing algorithms. Communication-efficient implementations with effectively overlapped computation and communication are achieved by manipulating the mathematical representation using the tenser algebra. Performance results for FFT programs on the Intel iPSC/860 and Intel Paragon are presented.
块递归算法在分布式内存机器上的高效通信实现
本文提出了一种为块递归算法(如快速傅立叶变换和双次排序)开发高效分布式存储并行程序的设计方法。这种设计方法特别适合大多数具有分布式内存架构的现代超级计算机,这些架构具有电路交换或虫洞路由网格或超立方体互连网络。基于张量积和其他矩阵运算的数学框架用于表示算法。通过使用张量代数对数学表示进行操作,实现了计算和通信有效重叠的高效通信实现。给出了在Intel iPSC/860和Intel Paragon上运行FFT程序的性能结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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