Realistic worst-case modeling by performance level principal component analysis

A. Nardi, A. Neviani, C. Guardiani
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引用次数: 1

Abstract

A new algorithm to determine the number and value of realistic worst-case models for the performance of module library components is presented in this paper. The proposed algorithm employs principal components analysis (PCA) at the performance level to identify the main independent sources of variance for the performance of a set of library modules. Response surfaces methodology (RSM) and propagation of variance (POV) based algorithms are used to efficiently compute the performance level covariance matrix and nonlinear maximum likelihood optimization to trace back worst case models at the SPICE level. The effectiveness of the proposed methodology has been demonstrated by determining a realistic set of worst case models for a 0.25 /spl mu/m CMOS standard cell library.
基于性能水平主成分分析的现实最坏情况建模
提出了一种确定模块库组件性能的实际最坏情况模型个数和值的新算法。该算法在性能层面采用主成分分析(PCA)来识别一组库模块性能的主要独立方差源。采用响应面法(RSM)和基于方差传播(POV)的算法高效地计算性能级协方差矩阵和非线性最大似然优化,在SPICE级追溯最坏情况模型。通过确定0.25 /spl mu/m CMOS标准单元库的一组现实的最坏情况模型,证明了所提出方法的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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