Systolic array prototyping using the Ptolemy environment

Abstract

In this paper we present an example of how the Ptolemy environment can be used constructively to implement and simulate systolic algorithms and architectures. Through graphical means, the user can easily obtain systolic circuit prototypes in a level high enough to be comprehensive and, at the same time, low enough to present the design complexity of a potential implementation. Moreover, the ability to simulate the functioning of the circuit ensures the correctness of a systolic algorithm. A brief introduction to the Ptolemy environment is given and a step by step creation of two typical systolic array designs is then described. A hierarchical design method is followed and details are given about the correct reflection of the synchronous nature of systolic circuits on typical dataflow executions.