Low power, low phase noise current reuse 2.45 GHz LC oscillator with MOS resistor

Deepak N. Agarwal, Y. K. Singh
{"title":"Low power, low phase noise current reuse 2.45 GHz LC oscillator with MOS resistor","authors":"Deepak N. Agarwal, Y. K. Singh","doi":"10.1109/RISE.2017.8378196","DOIUrl":null,"url":null,"abstract":"This work presents a current reused low power 2.45 GHz LC oscillator. The paper provides a cross coupled LC oscillator used with NMOS resistor and the current reuse topology where two series transistors as staked switches and MOS resistor for symmetric output are used. This oscillator is designed with 0.5-μm CMOS process in ADS. Two topologies of LC oscillator are designed. The topology 2/1 draws only 117.9/68 μA current at 2/2.5 V DC supply, resulting in the oscillator consuming a very low power (0.2358 /0.17mW). The phase noise of proposed oscillator is −139 dBc/Hz at an offset 1 MHz. In order to eliminate mismatch in the output, an NMOS is used in triode region with 0.8235V gate voltage as a voltage drop provider.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"156 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RISE.2017.8378196","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

This work presents a current reused low power 2.45 GHz LC oscillator. The paper provides a cross coupled LC oscillator used with NMOS resistor and the current reuse topology where two series transistors as staked switches and MOS resistor for symmetric output are used. This oscillator is designed with 0.5-μm CMOS process in ADS. Two topologies of LC oscillator are designed. The topology 2/1 draws only 117.9/68 μA current at 2/2.5 V DC supply, resulting in the oscillator consuming a very low power (0.2358 /0.17mW). The phase noise of proposed oscillator is −139 dBc/Hz at an offset 1 MHz. In order to eliminate mismatch in the output, an NMOS is used in triode region with 0.8235V gate voltage as a voltage drop provider.
低功耗,低相位噪声电流重用2.45 GHz LC振荡器与MOS电阻
本文提出了一种电流复用的低功耗2.45 GHz LC振荡器。本文提供了一个交叉耦合的LC振荡器与NMOS电阻和电流复用拓扑,其中两个串联晶体管作为堆叠开关和MOS电阻用于对称输出。该振荡器采用0.5 μm CMOS工艺设计,设计了LC振荡器的两种拓扑结构。在2/2.5 V直流电源下,2/1的电流仅为117.9/68 μA,因此振荡器功耗极低(0.2358 /0.17mW)。该振荡器在偏移1mhz时的相位噪声为- 139 dBc/Hz。为了消除输出失配,在三极管区域使用了NMOS,栅极电压为0.8235V作为压降提供器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信