{"title":"Low power, low phase noise current reuse 2.45 GHz LC oscillator with MOS resistor","authors":"Deepak N. Agarwal, Y. K. Singh","doi":"10.1109/RISE.2017.8378196","DOIUrl":null,"url":null,"abstract":"This work presents a current reused low power 2.45 GHz LC oscillator. The paper provides a cross coupled LC oscillator used with NMOS resistor and the current reuse topology where two series transistors as staked switches and MOS resistor for symmetric output are used. This oscillator is designed with 0.5-μm CMOS process in ADS. Two topologies of LC oscillator are designed. The topology 2/1 draws only 117.9/68 μA current at 2/2.5 V DC supply, resulting in the oscillator consuming a very low power (0.2358 /0.17mW). The phase noise of proposed oscillator is −139 dBc/Hz at an offset 1 MHz. In order to eliminate mismatch in the output, an NMOS is used in triode region with 0.8235V gate voltage as a voltage drop provider.","PeriodicalId":166244,"journal":{"name":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","volume":"156 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International Conference on Recent Innovations in Signal processing and Embedded Systems (RISE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RISE.2017.8378196","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This work presents a current reused low power 2.45 GHz LC oscillator. The paper provides a cross coupled LC oscillator used with NMOS resistor and the current reuse topology where two series transistors as staked switches and MOS resistor for symmetric output are used. This oscillator is designed with 0.5-μm CMOS process in ADS. Two topologies of LC oscillator are designed. The topology 2/1 draws only 117.9/68 μA current at 2/2.5 V DC supply, resulting in the oscillator consuming a very low power (0.2358 /0.17mW). The phase noise of proposed oscillator is −139 dBc/Hz at an offset 1 MHz. In order to eliminate mismatch in the output, an NMOS is used in triode region with 0.8235V gate voltage as a voltage drop provider.