A preliminary approach to the design and evaluation of a reconfigurable architecture for computer vision

Abstract

An analytical model describing the performance of a mesh-connected array of state-of-the-art VLSI microprocessors embedded in a CSP-like environment, is presented. The mode has been developed in the framework of a study aimed at the design and evaluation of a reconfigurable architecture especially suitable for the execution of both low and high level vision tasks. The validity of the model is demonstrated and its use illustrated.<>