H.264/AVC Video Encoder Implementation Based on TI TMS320DM642

Abstract

Compared with the previous standards, the coding efficiency and coding performance of H.264/AVC are improved at the cost of higher computational complexity. It is a big challenge for us to develop the embedded real-time H.264/AVC video encoder with the limited on-chip memory space. This paper introduces the method to develop and optimize the H.264/AVC "baseline' encoder on the TMS320DM642 DSP hardware platform. The emphasis is put on the optimization methods of memory space allocation, the strategy of data transfer and pixel interpolation in motion compensation. Hereinto, ping-pong buffering technique was used to optimize the input interface of H.264/AVC encoder and the bi-linear interpolation method was used to replace the 6-tap filter which has been adopted in the "x264" source program. Experiments show that the coding performance of the optimized encoder is improved effectively with a little loss in PSNR and video sequences with QCIF resolution can be encoded in real time.