Performance analysis and optimization of decision tree classifiers on embedded devices: work-in-progress

Abstract

Decision trees (DTs) offer a popular implementation choice for machine learning classifiers since they are highly interpretable and easy to use. Resource management decision overheads must be minimal in embedded systems to meet latency targets and deadline constraints. While the literature has preferred hardware architectures for DTs to meet latency targets, they are not suitable for ultra-low latency applications due to their data movement overheads despite the parallelism they offer. Therefore, we propose software optimization techniques for decision trees. The proposed DTs achieve lower than 50 ns latencies for depth 12, making them highly suitable for classification in embedded resource management.