Low voltage low power 4 bits digital to analog converter

Abstract

Novel high speed, low voltage (LV) low power (LP) current mode digital to analog converter (DAC) using the conventional technique (GD) an unconventional technique bulk driven quasi floating gate technique (BD-QFG) is presented in this paper. The performance of the proposed DAC has been simulated using the GD and the BD-QFG technique. The DAC based in the BD-QFG showed high performance in terms of dynamic performances, supply voltage, and power consumption in comparison to the GD DAC. The conventional and unconventional 4 bits DAC has been simulated in 0.18 μm CMOS technology. The proposed circuit has been simulated through an ELDO simulator. The BD-QFG DAC achieves a bandwidth (750 MHz), low power consumption (0.114 mW), low supply voltage (0.8V).