{"title":"New characteristics of direct hole tunneling through ultrathin gate oxide (2.7 nm) in p+/pMOS and its applications","authors":"M. Chi, C. Yu, Ming-chen Chen, M. Jeng","doi":"10.1109/HKEDM.2000.904225","DOIUrl":null,"url":null,"abstract":"New characteristics of direct hole tunneling current in pMOS transistors with ultra-thin gate oxide (2.7 nm) biased in accumulation is reported in this paper. Interestingly, this direct hole current (measured at source/drain at 0v and positive gate bias for charge separation technique) increases initially as the gate is biased from 0v to flat-band (/spl sim/0.7 v), then the hole current decreases rapidly by recombination of electrons accumulation on channel surface as the gate bias close to /spl sim/1.2 v. With further increase of gate bias (>1.2 v), the hole current measured at p+ S/D increases again due to gate-induced-drain-leakage (GIDL) mechanism. The behavior of hole current measured at p+ S/D, which involves mechanisms of direct hole tunneling, holes recombination by accumulation electrons, and GIDL, is useful for process characterization. Examples of edge thickening effect, boron penetration effect, and gate oxide nitridation effect, are illustrated in this paper.","PeriodicalId":178667,"journal":{"name":"Proceedings 2000 IEEE Hong Kong Electron Devices Meeting (Cat. No.00TH8503)","volume":"774 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 2000 IEEE Hong Kong Electron Devices Meeting (Cat. No.00TH8503)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HKEDM.2000.904225","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
New characteristics of direct hole tunneling current in pMOS transistors with ultra-thin gate oxide (2.7 nm) biased in accumulation is reported in this paper. Interestingly, this direct hole current (measured at source/drain at 0v and positive gate bias for charge separation technique) increases initially as the gate is biased from 0v to flat-band (/spl sim/0.7 v), then the hole current decreases rapidly by recombination of electrons accumulation on channel surface as the gate bias close to /spl sim/1.2 v. With further increase of gate bias (>1.2 v), the hole current measured at p+ S/D increases again due to gate-induced-drain-leakage (GIDL) mechanism. The behavior of hole current measured at p+ S/D, which involves mechanisms of direct hole tunneling, holes recombination by accumulation electrons, and GIDL, is useful for process characterization. Examples of edge thickening effect, boron penetration effect, and gate oxide nitridation effect, are illustrated in this paper.