Securing IP Cores in CE Systems using Key-driven Hash-chaining based Steganography

Mahendra Rathor, Pallabi Sarkar, V. Mishra, A. Sengupta
{"title":"Securing IP Cores in CE Systems using Key-driven Hash-chaining based Steganography","authors":"Mahendra Rathor, Pallabi Sarkar, V. Mishra, A. Sengupta","doi":"10.1109/ICCE-Berlin50680.2020.9352192","DOIUrl":null,"url":null,"abstract":"Digital signal processor (DSP) intellectual property (IP) cores are the underlying hardware responsible for high performance data intensive applications. However an unauthorized IP vendor may counterfeit the DSP IPs and infuse them into the design-chain. Thus fake IPs or integrated circuits (ICs) are unknowingly integrated into consumer electronics (CE) systems, leading to reliability and safety issues for users. The latent solution to this threat is hardware steganography wherein vendor’s secret information is covertly inserted into the design to enable detection of counterfeiting. A key-regulated hash-modules chaining based IP steganography is presented in our paper to secure against counterfeiting threat. The proposed approach yielded a robust steganography achieving very high security with regard to stego-key length than previous approaches.","PeriodicalId":438631,"journal":{"name":"2020 IEEE 10th International Conference on Consumer Electronics (ICCE-Berlin)","volume":"242 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 10th International Conference on Consumer Electronics (ICCE-Berlin)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCE-Berlin50680.2020.9352192","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

Abstract

Digital signal processor (DSP) intellectual property (IP) cores are the underlying hardware responsible for high performance data intensive applications. However an unauthorized IP vendor may counterfeit the DSP IPs and infuse them into the design-chain. Thus fake IPs or integrated circuits (ICs) are unknowingly integrated into consumer electronics (CE) systems, leading to reliability and safety issues for users. The latent solution to this threat is hardware steganography wherein vendor’s secret information is covertly inserted into the design to enable detection of counterfeiting. A key-regulated hash-modules chaining based IP steganography is presented in our paper to secure against counterfeiting threat. The proposed approach yielded a robust steganography achieving very high security with regard to stego-key length than previous approaches.
使用基于密钥驱动哈希链的隐写术保护CE系统中的IP核
数字信号处理器(DSP)知识产权(IP)核心是负责高性能数据密集型应用的底层硬件。然而,未经授权的IP供应商可能伪造DSP IP并将其注入设计链中。因此,假冒ip或集成电路(ic)被不知不觉地集成到消费电子(CE)系统中,给用户带来可靠性和安全性问题。这种威胁的潜在解决方案是硬件隐写术,其中供应商的秘密信息被秘密地插入到设计中,以便检测假冒。本文提出了一种基于键调节哈希模块链的IP隐写技术,以防止伪造威胁。与以前的方法相比,所提出的方法产生了鲁棒的隐写术,在隐写密钥长度方面实现了非常高的安全性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信