{"title":"Active Learning Methods Applied in the Course “Digital Electronics” on the Topic “Arithmetic Circuits Using FPGA Design”","authors":"A. Borodzhieva, I. Stoev, V. Mutkov","doi":"10.1109/EAEEIE46886.2019.9000421","DOIUrl":null,"url":null,"abstract":"The paper presents FPGA implementation of half-adders, adders and multistage combinational adders on a laboratory board and a way of presenting this topic to the students at the University of Ruse making the classes more attractive for students using active learning methods.","PeriodicalId":221469,"journal":{"name":"2019 29th Annual Conference of the European Association for Education in Electrical and Information Engineering (EAEEIE)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 29th Annual Conference of the European Association for Education in Electrical and Information Engineering (EAEEIE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EAEEIE46886.2019.9000421","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
The paper presents FPGA implementation of half-adders, adders and multistage combinational adders on a laboratory board and a way of presenting this topic to the students at the University of Ruse making the classes more attractive for students using active learning methods.