{"title":"Face Landmark Detection Based on Deep Learning Processor Unit on ZYNQ MPSoC","authors":"Weizhuang Liu, Kejun Tan","doi":"10.1109/ICSP54964.2022.9778436","DOIUrl":null,"url":null,"abstract":"Convolutional neural network (CNN) has a wide range of applications in face detection and recognition, image classification and semantic segmentation, but it is very difficult to deploy CNN on FPGA embedded platform. The Deep Learning Processor Unit (DPU) released by Xilinx is different from the previous deployment of FPGA, which can accelerate the realization of CNN deployment on FPGA platform and supports a variety of classical CNN structures. In this paper, the face and landmark detection CNN is deployed on ZCU102 platform using DPU based on idea of hardware and software co-design. According to the network features supported by DPU, Normalize network features in VGG-SSD were adjusted to BatchNormalize network features, Convolution was added in LeNet and a double-layer convolution structure was adopted, and the model was pruned to reduce resource consumption and computation. Dual-core DPU and deep flow architecture were used to improve data throughput. The experimental results show that the average detection time of single frame video image face and landmark detection is 26ms, and this design improves the acceleration effect significantly, and has good scalability.","PeriodicalId":363766,"journal":{"name":"2022 7th International Conference on Intelligent Computing and Signal Processing (ICSP)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 7th International Conference on Intelligent Computing and Signal Processing (ICSP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSP54964.2022.9778436","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Convolutional neural network (CNN) has a wide range of applications in face detection and recognition, image classification and semantic segmentation, but it is very difficult to deploy CNN on FPGA embedded platform. The Deep Learning Processor Unit (DPU) released by Xilinx is different from the previous deployment of FPGA, which can accelerate the realization of CNN deployment on FPGA platform and supports a variety of classical CNN structures. In this paper, the face and landmark detection CNN is deployed on ZCU102 platform using DPU based on idea of hardware and software co-design. According to the network features supported by DPU, Normalize network features in VGG-SSD were adjusted to BatchNormalize network features, Convolution was added in LeNet and a double-layer convolution structure was adopted, and the model was pruned to reduce resource consumption and computation. Dual-core DPU and deep flow architecture were used to improve data throughput. The experimental results show that the average detection time of single frame video image face and landmark detection is 26ms, and this design improves the acceleration effect significantly, and has good scalability.