Design of high linear CMOS Mixer for 5G Applications

Abstract

In this article, we are going to design and propose a mixer for 5G applications. The proposed mixer has a noise figure (NF) between 10- 11dB and an achieved gain of 15–17 dB in the operating Frequency of 30 GHz. The proposed mixer is designed in TSMC 180nm which has a reversed isolation of -47 dB in this frequency, and it has an OP1dB of 30 dBm in the RF port of 20dBm. The IP3 of the proposed mixer is about 60dBm. The techniques used for designing the proposed mixer are the current mirror PMOS transistors to enhance the gain and the inductive degeneration in RF transistors to increase the linearity.