{"title":"Notice of RetractionReal-time Data Storage Research Based on RAM","authors":"Zhang Yan, Liu Wenyi","doi":"10.1109/ICCTD.2009.36","DOIUrl":null,"url":null,"abstract":"The use of FPGA internal RAM can be an effective alternative to external FIFO, using the method OF Programming FOR the FPGA, Make full use of FPGA internal resources that provided strong support For the realization of a programmable system chip (SOPC, SystemOn Programable Chip). It Effected reducing the use of devices and minimizing the circuit boards. Acquisition and storage respectively controlled by two FPGA chips in this study. Use their own internal RAM, program variety controlling models by VHDL hardware language. And then connect the internal schematic to replace the external FIFO. This is the internal FIFO of FPGA.","PeriodicalId":269403,"journal":{"name":"2009 International Conference on Computer Technology and Development","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2009-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Conference on Computer Technology and Development","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCTD.2009.36","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The use of FPGA internal RAM can be an effective alternative to external FIFO, using the method OF Programming FOR the FPGA, Make full use of FPGA internal resources that provided strong support For the realization of a programmable system chip (SOPC, SystemOn Programable Chip). It Effected reducing the use of devices and minimizing the circuit boards. Acquisition and storage respectively controlled by two FPGA chips in this study. Use their own internal RAM, program variety controlling models by VHDL hardware language. And then connect the internal schematic to replace the external FIFO. This is the internal FIFO of FPGA.