{"title":"FPGA-implementation of an adaptive neural network for RF power amplifier modeling","authors":"M. Bahoura, Chan-Wang Park","doi":"10.1109/NEWCAS.2011.5981211","DOIUrl":null,"url":null,"abstract":"In this paper, we propose an architecture for FPGA-implementation of neural adaptive neural network RF power behavioral modeling. The real-valued time-delay neural network (RVTDNN) and the backpropagation (BP) learning algorithm were implemented on FPGA using Xilinx System Generator for DSP and the Virtex-6 FPGA ML605 Evaluation Kit. Performances obtained with 16-QAM modulated test signal and material resource requirement are presented for a network of six hidden layer neurons.","PeriodicalId":271676,"journal":{"name":"2011 IEEE 9th International New Circuits and systems conference","volume":"46 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE 9th International New Circuits and systems conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NEWCAS.2011.5981211","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 18
Abstract
In this paper, we propose an architecture for FPGA-implementation of neural adaptive neural network RF power behavioral modeling. The real-valued time-delay neural network (RVTDNN) and the backpropagation (BP) learning algorithm were implemented on FPGA using Xilinx System Generator for DSP and the Virtex-6 FPGA ML605 Evaluation Kit. Performances obtained with 16-QAM modulated test signal and material resource requirement are presented for a network of six hidden layer neurons.
本文提出了一种fpga实现的神经自适应神经网络射频功率行为建模体系结构。采用基于Xilinx System Generator的DSP和Virtex-6 FPGA ML605评估套件,在FPGA上实现了实值时滞神经网络(RVTDNN)和反向传播(BP)学习算法。给出了一个包含6个隐层神经元的网络,在16-QAM调制测试信号和材料资源需求下所获得的性能。