Investigation of retention behavior for 3D charge trapping NAND flash memory by 2D self-consistent simulation

Z. Lun, Shuhuan Liu, Y. He, Yi Hou, K. Zhao, G. Du, Xiaoyan Liu, Yi Wang
{"title":"Investigation of retention behavior for 3D charge trapping NAND flash memory by 2D self-consistent simulation","authors":"Z. Lun, Shuhuan Liu, Y. He, Yi Hou, K. Zhao, G. Du, Xiaoyan Liu, Yi Wang","doi":"10.1109/SISPAD.2014.6931583","DOIUrl":null,"url":null,"abstract":"This paper presents a comprehensive investigation on retention behavior for three-dimensional charge trapping NAND flash memory by two-dimensional self-consistent simulation. Major physical mechanisms, including tunneling, charge trapping and de-trapping process as well as drift-diffusion have been incorporated into the simulator. The developed simulator is able to describe the charge transport along the bitline and in vertical direction in the memory structure. This work aims to help to design and optimize three-dimensional stackable CT-NAND architectures.","PeriodicalId":101858,"journal":{"name":"2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","volume":"89 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SISPAD.2014.6931583","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 17

Abstract

This paper presents a comprehensive investigation on retention behavior for three-dimensional charge trapping NAND flash memory by two-dimensional self-consistent simulation. Major physical mechanisms, including tunneling, charge trapping and de-trapping process as well as drift-diffusion have been incorporated into the simulator. The developed simulator is able to describe the charge transport along the bitline and in vertical direction in the memory structure. This work aims to help to design and optimize three-dimensional stackable CT-NAND architectures.
二维自洽模拟研究三维电荷捕获NAND闪存的保留行为
本文采用二维自洽模拟的方法对三维电荷捕获NAND闪存的保留行为进行了全面的研究。主要的物理机制,包括隧道,电荷捕获和释放捕获过程以及漂移扩散已纳入模拟器。所开发的模拟器能够描述存储器结构中沿位线和垂直方向的电荷输运。这项工作旨在帮助设计和优化三维可堆叠CT-NAND架构。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信