Efficient Design of a Coplanar Adder/Subtractor in Quantum-Dot Cellular Automata

Abstract

Scaling of CMOS devices being aggressively decreasing by reduce of transistor dimensions. However, such level of integration leads to many physical limit and transistors cannot get much smaller than their current size. Quantum-dot Cellular Automate is a novel technology which significantly reduces physical limit of CMOS devices implementation, thus, it can be an appropriate candidate to be substituted for CMOS technology. In addition to high integration density of QCA circuits, other unique specifications such as high speed and low power consumption encourage researchers to utilize this technology instead of CMOS technology. In this paper, a new layout of XOR gate is presented in QCA technology, then, it is exploited to design an 8-bit controllable inverter. Finally, using the proposed design and last adder circuit provided by ourselves in our previous work, an 8-bit adder/subtract or is designed. It is the most important component of an ALU. All the designed circuits have used coplanar clock-zone based crossover. The most prominent characteristics of designed circuits include very high operation speed, very low complexity, small area, completely coplanar design, and also avoiding rotated cells in us designs for Avoidance of Construction Challenges QCA Circuits. The mentioned characteristics are considerably improved in our proposed structure comparing to its counterparts. The proposed structure is verified and evaluated in QCA framework using QCA Designer Ver.2.0.3 software.