{"title":"A Low-Quiescent Current Off-Chip Capacitor-less LDO Regulator with UGCC Compensation","authors":"Peiju Liu, S. Huang, Q. Duan, Qian Zhu, Zhen Meng","doi":"10.1109/EDSSC.2019.8754106","DOIUrl":null,"url":null,"abstract":"A low quiescent current off-chip capacitor-less low-dropout regulator (CL-LDO) for system on a chip applications is proposed in this study. An error amplifier with embedded unity gain compensation cell (UGCC) circuit is designed to improve both circuit stability and load transient performance. The proposed CL-LDO with a total quiescent current of $1.9~\\mu \\text{A}$ and a power supply range from 1.2 to 1.8 V achieves a stable 1 V output. The maximum overshoot voltage is less than 53.1 mV when a maximum current load is 100 mA. The proposed CL-LDO is fabricated in a $0.18~\\mu \\text{m}$ standard CMOS process. It occupies an active area of 0.094 mm2.","PeriodicalId":183887,"journal":{"name":"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2019.8754106","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
A low quiescent current off-chip capacitor-less low-dropout regulator (CL-LDO) for system on a chip applications is proposed in this study. An error amplifier with embedded unity gain compensation cell (UGCC) circuit is designed to improve both circuit stability and load transient performance. The proposed CL-LDO with a total quiescent current of $1.9~\mu \text{A}$ and a power supply range from 1.2 to 1.8 V achieves a stable 1 V output. The maximum overshoot voltage is less than 53.1 mV when a maximum current load is 100 mA. The proposed CL-LDO is fabricated in a $0.18~\mu \text{m}$ standard CMOS process. It occupies an active area of 0.094 mm2.