A chip-level process for power switching module integration and packaging

Z. Liang, J. D. van Wyk, F. Lee
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引用次数: 8

Abstract

A process module, incorporating embedding of multiple power semiconductor chips in a flat ceramic frame and planar metallization interconnect technologies, has been developed to fabricate active power chip scale packages (CSP), multichip modules (MCMs), and integrated power electronics modules (IPEMs). This integrated chips technology features structure compactness and process integrity, compared to other multilevel packaging methods. Thus, power switching module, including controller and driver, sensor and filter, and power switches can be manufactured with a planar integration technology and packaged in 3-D form. An example IPEM, incorporating power factor correction (PFC) and DC/DC switching stages for a distributed power system (DPS) front-end converter application, has been fabricated and characterized. The electrical performance improvement, which includes reduction in parasitics and increase in efficiency, has been demonstrated. Furthermore, a highly functional integrated PFC switching module with embedded capacitor, current sensor and doubled side cooling has been fabricated in an integrated planar process scheme. The obtained experimental results are presented with prototypes.
用于电源交换模块集成和封装的芯片级过程
一种将多个功率半导体芯片嵌入扁平陶瓷框架和平面金属化互连技术相结合的工艺模块,已被开发用于制造有源功率芯片规模封装(CSP)、多芯片模块(mcm)和集成电力电子模块(IPEMs)。与其他多层封装方法相比,这种集成芯片技术具有结构紧凑和工艺完整的特点。因此,可以使用平面集成技术制造功率开关模块,包括控制器和驱动器,传感器和滤波器以及功率开关,并以3d形式封装。制作并表征了用于分布式电力系统(DPS)前端变换器的集成功率因数校正(PFC)和DC/DC开关级的IPEM实例。电性能的改善,包括减少寄生和提高效率,已被证明。在此基础上,采用集成平面工艺方案,制作了具有嵌入式电容、电流传感器和双面冷却的高性能集成PFC开关模块。并结合样机给出了实验结果。
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