Simultaneous linearity and efficiency enhancement of a digitally-assisted GaN power amplifier for 64-QAM

Monte K. Watanabe, R. Snyder, T. LaRocca
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引用次数: 7

Abstract

The first dynamic 4-bit, digitally-assisted GaN high power amplifier (DAPA) system transmitting 7.68Msymbol/s with 64-QAM modulation is presented. An FPGA is programmed to generate the pulse-shaped 64-QAM signal, perform envelope estimation, and time-align the RF and digital control signals arriving at the DAPA. A high-speed, level-shifting circuit converts the FPGA's low-voltage differential signaling (LVDS) DAPA control signals into single-ended logic levels required for the depletion-mode GaN HEMT DAPA auxiliary cells. Measured results show 9.6% DC power savings, 23% improved PAE, and 23% higher output power at 4% EVMRMS compared to the static PA configuration.
用于64-QAM的数字辅助GaN功率放大器的同步线性和效率提高
提出了第一个动态4位数字辅助GaN高功率放大器(DAPA)系统,该系统采用64-QAM调制,传输速率为7.68Msymbol/s。对FPGA进行编程,生成脉冲形64-QAM信号,执行包络估计,并对到达DAPA的RF和数字控制信号进行时间对齐。高速电平转换电路将FPGA的低压差分信号(LVDS) DAPA控制信号转换为耗尽模式GaN HEMT DAPA辅助单元所需的单端逻辑电平。测量结果显示,与静态PA配置相比,在4% EVMRMS下,直流功耗节省9.6%,PAE提高23%,输出功率提高23%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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